Integrated circuit for generation of reference voltage

  • Inventors:
  • Assignees: Fujitsu Ltd
  • Publication Date: November 16, 1981
  • Publication Number: JP-S56147212-A

Abstract

PURPOSE:To make the reference voltage generating circuit low-power source voltage, by connecting bases of two transistors (TR) different in emitter area commonly and by providing a generating circuit for a current proportional to emitter currents of TRs between TRs and the power source. CONSTITUTION:Equal currents are supplied to collectors of TRs Q1 and Q2 from current Miller CM circuit, and bases of TRs Q1 and Q2 are connected commonly. The emitter area of TR Q1 is smaller than that of TR Q2, and the emitter of TR Q1 is grounded directly, and the emitter of TR Q2 is grounded through resistance R1. Resistance R2 is provided between base common connection point D of TRs Q1 and Q2 and output terminal B, and TR Q6 is connected between connection point D and the earth. TRs Q6 and Q1 form a current Miller circuit, and currents proportional to the emitter area ratio of them can be flowed, and the temperature characteristic of voltage VBE1 between the base and the emitter of TR Q1 is compensated by the temperature characteristic of voltage drop of resistance R2, and output reference voltage VB is kept constant. Since the emitter of TR Q1 is grounded, potential VA at point A is lowered.

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Cited By (6)

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    US-6089770-AJuly 18, 2000Seiko Epson CorporationPeeling device, tape processing device incorporating the peeling device, and tape printing apparatus incorporating the tape processing device
    US-6280107-B2August 28, 2001Seiko Epson Corporation, King Jim Co., Ltd.Peeling device, tape processing device incorporating the peeling device, and tape printing apparatus incorporating the tape processing device