PURPOSE:To prevent the erroneous operation of a motor due to sneaked data retained at a instantaneous register by providing a data latch circuit between instantaneousl register group and an increment unit/decrement unit. CONSTITUTION:One register in a register group 572 is selected instantaneously by a stage decoder 672, its data retained is applied through a data latch circuit 576 and increment unit/decrement unit I/D 578 to a comparator circuit 580, and a closed loop for returning it to the selected register is formed. Accordingly, when the I/D578 operates a function of increasing or decreasing one for the data, this loop operates as a counter. The circuit 576 becomes enable state ''T'' when a clock signal phi2=1, and because the state ''T'' wherein input data is written into instantaneous register means clock signal phi1=1, the output of the circuit 576 is not changed even if the data of the special register of the register group 572 is converted but the data is cut at the signal phi2=0. Accordingly, it can prevent the erroneous operation due to sneaked data.